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标题: 8个古董CPU,罕见. [打印本页]
作者: 天道酬勤 时间: 2006-12-12 23:25 标题: 8个古董CPU,罕见.
8个古董CPU,很罕见的,
200元买进的,说瞎话的是小狗,是骗子.
谁要买最好一次都买走,这样便宜,
不买的你也看,给调侃2句帮个人场吧,
我有个愿望:希望这个栏目成为中国最大的古董CPU交流平台.
大家有多余的CPU,拿到这里摆摆,卖不卖图个热闹.
说的跑题了.大家看看看我想卖的8个CPU:
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作者: hugo929 时间: 2006-12-13 00:16
偶得wei kou bu gou da a
作者: 天道酬勤 时间: 2006-12-13 00:31
以下是引用hugo929在2006-12-13 0:16:25的发言:
偶得wei kou bu gou da a
很多人胃口还是很大的.
WTO已经5年啦!
作者: hugo929 时间: 2006-12-13 20:56
The A1280A devices were in a CPGA176 package and were active during irradiation.
All die were from the Matsushita (MEC) foundry with a 1.0 mm feature size. Upsets and
currents were monitored in real-time with the device being clocked at 1 MHz. The
stimulation pattern was a 500 kHz square wave. The test pattern used, the TMRA2.C,
contains 522 S-Module flip-flops and 40 C-Module flip-flops.
Sample devices were taken from several lots used previously in radiation tests along with
a few ‘spare devices’ to increase sample size. A total of 19 devices were used in this
study. The intent of the study was to investigate the proton response of the hard-wired SModule
flip-flops with a large sample size. Previous testing did not detect proton upset
within the operating voltage range but used a low fluence.
作者: hugo929 时间: 2006-12-13 21:06
At Purdue University Dr. Hank Dietz is using TIs TPC1280 device
in a parallel computing application called a PAPERS, (Purdue's
Adapter for Parallel Execution and Rapid Synchronization.
Although traditional computer networks (Ethernet, FDDI, HiPPI,
ATM, etc.) can provide good communication bandwidth for
transmission of relatively large messages, effective use of a
cluster of workstations or personal computers as a parallel
computer depends on low-latency barrier synchronization and
fine-grain aggregate communication operations. PAPERS supports
these operations by connecting each workstation to a dedicated
barrier processor that interacts with the other barrier
processors to form a highly specialized parallel engine for
synchronization and aggregate communication. TI FPGAs allow
multiple custom barrier processors to be implemented per chip,
and the FPGA easily conforms to a variety of low-latency
computer interfaces. Combining this hardware with a carefully
designed set of library routines yields barrier synchronization
and aggregate communication that is at least a factor of
2,000-10,000x faster than a traditional workstation network
implementation
作者: 天道酬勤 时间: 2006-12-13 22:06
A1280A设备在一个CPGA176包裹并且在照耀期间是活跃的。
所有的死从Matsushita(MEC) 有1.0公里特征尺寸的翻砂。 推翻与
水流被监视在实时与设备在1 MHz的clocked。
激励模式是500 kHz方形的波浪。 测试模式使用了, TMRA2...,
包含522台S模件正反器和40台C模件正反器。
从在放射测试以前被使用了与一起的若干许多样品设备被拿
一些‘业余的设备’ 增加样品尺寸。 一全部19套设备的被使用在这
学习。 书房的目的是调查电路的SModule的质子反应
有大样品尺寸的正反器。 先前的测试没检测推翻的质子
在操作的电压范围以内但是使用了一低的fluence。
作者: 天道酬勤 时间: 2006-12-13 22:07
在Purdue大学医生。 丝等Dietz正在使用TIs TPC1280设备
在一块计算申请调用了一篇论文, (Purdue的
为并行执行和迅速的同步的适配器。
尽管传统型的计算机网络(以太网, 光纤分布式数据接口, HiPPI,
异步传输格式, 等等。) 能提供好通讯带宽为
相关地大的消息的播送, 有效的使用的一
工作站或个人计算机的簇作为一平行
计算机取决于低潜在障碍同步与
杰出谷物总数通讯军事行动。 论文支持
由把每座工作站连结到的这些军事行动一专注
携带着另外的障碍那交往的障碍处理器
形成一个高地被专业化了平行的引擎为的处理器
同步和总数通讯。 TI FPGAs允许
每芯片被实现的多样的习俗障碍处理器,
与FPGA容易遵照多种低潜在
计算机接口。 把这硬件与相结合一小心地
图书馆常规的设计的集合生产障碍同步
与总数通讯那是至少一个因素的
2,000-10,000x快与比传统型的工作站网络
实现
作者: hugo929 时间: 2006-12-13 23:08
[em06][em06][em06][em06][em06]
请个外星人来翻译一下吧。
以上两个都是FPGA,都是美国宇航局用的!
CF311000彻底没有资料了,不过反倒是感觉像是个U,昂。
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