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    楼主
    发表于 2006-12-13 00:16 | 显示全部帖子
    偶得wei kou bu gou da a
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    沙发
    发表于 2006-12-13 20:56 | 显示全部帖子

    The A1280A devices were in a CPGA176 package and were active during irradiation.
    All die were from the Matsushita (MEC) foundry with a 1.0 mm feature size. Upsets and
    currents were monitored in real-time with the device being clocked at 1 MHz. The
    stimulation pattern was a 500 kHz square wave. The test pattern used, the TMRA2.C,
    contains 522 S-Module flip-flops and 40 C-Module flip-flops.
    Sample devices were taken from several lots used previously in radiation tests along with
    a few ‘spare devices’ to increase sample size. A total of 19 devices were used in this
    study. The intent of the study was to investigate the proton response of the hard-wired SModule
    flip-flops with a large sample size. Previous testing did not detect proton upset
    within the operating voltage range but used a low fluence.

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    板凳
    发表于 2006-12-13 21:06 | 显示全部帖子
    At Purdue University Dr. Hank Dietz is using TIs TPC1280 device
         in a parallel computing application called a PAPERS, (Purdue's
         Adapter for Parallel Execution and Rapid Synchronization.
         Although traditional computer networks (Ethernet, FDDI, HiPPI,
         ATM, etc.) can provide good communication bandwidth for
         transmission of relatively large messages, effective use of a
         cluster of workstations or personal computers as a parallel
         computer depends on low-latency barrier synchronization and
         fine-grain aggregate communication operations.  PAPERS supports
         these operations by connecting each workstation to a dedicated
         barrier processor that interacts with the other barrier
         processors to form a highly specialized parallel engine for
         synchronization and aggregate communication.  TI FPGAs allow
         multiple custom barrier processors to be implemented per chip,
         and the FPGA easily conforms to a variety of low-latency
         computer interfaces.  Combining this hardware with a carefully
         designed set of library routines yields barrier synchronization
         and aggregate communication that is at least a factor of
         2,000-10,000x faster than a traditional workstation network
         implementation
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    地板
    发表于 2006-12-13 23:08 | 显示全部帖子

    [em06][em06][em06][em06][em06]

    请个外星人来翻译一下吧。

    以上两个都是FPGA,都是美国宇航局用的!

    CF311000彻底没有资料了,不过反倒是感觉像是个U,昂。

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